In the fabrication of integrated circuitry, numerous devices are packed onto a single small area of a semiconductor substrate to create an integrated circuit. Many of the individual devices are electrically isolated from one another. Accordingly, electrical isolation is an integral part of semiconductor device design for preventing unwanted electrical coupling between adjacent components and devices.
As the size of integrated circuits is reduced, the devices that make up the circuits are positioned closer together. Conventional methods of isolating circuit components use trench isolation. Such is typically formed by etching trenches into a semiconductor substrate and filling the trenches with insulative material. As the density of components on the semiconductor substrate increased, the widths of the trenches have decreased. Further, it is not uncommon to find different areas of a substrate as having different width and/or different depth isolation trenches. Also and regardless, some areas of integrated circuitry have greater minimum active area spacing between isolation trenches than do other areas.
Insulative materials that are commonly utilized for electrical isolation within isolation trenches include silicon dioxide and silicon nitride. For example, it is common to thermally oxidize trench sidewalls within a silicon-comprising semiconductor substrate, and provide a thin silicon nitride layer thereover. The remaining volume of the trenches is then filled with an insulative material, for example high density plasma deposited silicon dioxide. Yet as trenches have become deeper and narrower, high density plasma deposited oxides can result in undesired void formation within the trenches during filling. Alternate techniques which provide better conformal deposition within isolation trenches include spin-on-dielectrics and chemical vapor deposition utilizing ozone and tetraethylorthosilicate (TEOS). Such latter processes, while resulting in good void-free gap filling, typically result in a silicon dioxide deposition which is not as dense as desired. Accordingly, a steam anneal at very high temperatures is typically utilized to densify the deposited silicon dioxide. To preclude undesired oxide formation of underlying material, a silicon nitride oxidation barrier layer is typically employed within all of the trenches to shield underlying material from being oxidized during the steam anneal.
Further and regardless, deposition using ozone/TEOS or high density plasma oxides typically requires deposition thicknesses much greater than the depths of the trenches themselves to get adequate fill within the trenches. This of course adds to the time required to later remove such material from laterally outward of the trenches. Further even with spin-on-dielectrics, it is sometimes very difficult to get the material to deep within high aspect ratio trenches, and to densify such material at the bases of such trenches.
While the invention was motivated in addressing the above identified issues, it is in no way so limited. The invention is only limited by the accompanying claims as literally worded, without interpretative or other limiting reference to the specification, and in accordance with the doctrine of equivalents.